Intel & Cadence team up for customised tech development

Intel has entered into a multiyear strategic agreement with Cadence Design Systems. This collaboration aims to develop a range of customised intellectual property, optimised design flows and techniques specific to Intel process technology.

Intel Foundry Services (IFS) and Cadence Design Systems Inc. aim to offer their joint clientele a chance to accelerate system-on-chip (SoC) project schedules on process nodes from Intel 18A and beyond. This alliance is slated to optimise for performance, power, area, bandwidth and latency specifically for high-demand areas such as artificial intelligence, high performance computing and premium mobile applications.

The partnership will utilise the RibbonFET gate-all-around transistors and PowerVia backside power delivery feature of the Intel 18A process technology. By doing this, the alliance intends to establish a more efficient ecosystem for IFS, thus extending more choices to its customers.

Stuart Pann, Intel's Senior Vice President and General Manager of IFS, expressed his excitement about the expansion of the partnership with Cadence. He said, "We will leverage Cadence's world-class portfolio of leading IP and advanced design solutions to enable our customers to deliver high-volume, high-performance and power-efficient SoCs on Intel's leading-edge process technologies."

Anirudh Devgan, President and Chief Executive Officer at Cadence, also affirmed the importance of this strategic partnership with Intel Foundry Services. "We furthered our partnership with Intel Foundry Services through a significant strategic multiyear agreement to provide design software and leading IP at multiple Intel advanced nodes, thereby advancing Intel's IDM 2.0 strategy and accelerating mutual customer success," he shared.

Such advanced partnerships are crucial for sustaining the fast-growing market segments such as artificial intelligence/machine learning, high-performance computing and premium mobile computing. In these sectors, the latest standards in IP are required in order to leverage advanced packaging and silicon process technologies. Cadence, with its leading-edge implementations of unprecedented standards like advanced memory protocols, PCI Express, UCI Express and others for these key sectors, enables joint customers to achieve scalable, high-performance designs. Consequently, it accelerates their time to market in IFS' most advanced silicon technologies and 3D-IC packaging capabilities.