Qualcomm and Amazon team up on AI data centre chips

Qualcomm has announced a multi-generational collaboration with Amazon focused on customised silicon for AWS AI data centre infrastructure.

The agreement also covers optical connectivity and expanded use of AWS tools by Qualcomm for chip design workloads.

The companies will work together across multiple generations of silicon for large-scale AI data centres, with a particular focus on AI inference. The deal places Qualcomm more directly alongside major cloud providers that are increasingly designing or commissioning custom chips to meet the growing demands of artificial intelligence services.

They are also developing optical connectivity products extending to 1.6T, as well as later-generation designs. Qualcomm said the effort will draw on its serializer-deserializer, or SerDes, technology and optical digital signal processing.

Demand for AI infrastructure has pushed cloud operators to seek gains not only in processors but also in the links connecting servers and networking equipment inside data centres. Faster optical interconnects are becoming more important as AI systems scale up and require more bandwidth between compute, storage and memory resources.

For Amazon Web Services, the collaboration adds to a broader strategy of building and sourcing specialised silicon for AI workloads. Custom chips have become a key area of competition among cloud providers as they seek to manage the cost, performance and energy use of increasingly complex AI models.

Qualcomm, long known for mobile and communications chips, has in recent years expanded into automotive, personal computing and infrastructure markets. The Amazon tie-up signals a deeper push into data centre hardware, where AI investment has driven intense activity among semiconductor suppliers and hyperscale operators.

Design work

As part of the broader arrangement, Qualcomm plans to expand its use of AWS AI infrastructure for electronic design automation workloads. That includes Amazon Bedrock, which it will use as it seeks to shorten chip design cycles.

Electronic design automation tools are central to semiconductor development, covering tasks such as circuit design, verification and testing. Any reduction in design time can have commercial value in a market where new chip generations are released under heavy competitive pressure.

The announcement also highlights how semiconductor groups are using cloud-based AI services not only as suppliers to cloud platforms, but also as customers. The relationship is becoming more intertwined as chip designers seek larger pools of compute for simulation and design tasks.

Cristiano Amon outlined Qualcomm's view of the infrastructure challenge created by AI growth.

"As AI demand accelerates, data center infrastructure will require advances in both computing and connectivity to deliver greater performance with more efficiency," said Cristiano Amon, President and Chief Executive Officer, Qualcomm. "Qualcomm is pleased to work with AWS on customized silicon and connectivity solutions, bringing decades of leadership in advanced processing and power-efficient compute, to deliver breakthrough performance and enable the next generation of AI infrastructure."

Amazon said the agreement builds on an existing relationship between the two companies.

"This collaboration with Qualcomm Technologies builds on a strong foundation of partnership and reflects our shared commitment to pushing the boundaries of what's possible," said Prasad Kalyanaraman, Vice President, AWS. "By working together on customized silicon and advanced connectivity, we're delivering more performant, efficient, and cost-effective infrastructure for our customers."

The deal comes as the semiconductor and cloud sectors race to secure positions in AI infrastructure, a market spanning processors, networking, optical components and the software systems used to develop them. By combining custom silicon work, optical interconnect development and Qualcomm's use of AWS design resources, the collaboration spans both the supply side and the internal engineering processes behind future chips.